An electronic image sensor captures images using light-sensitive photodetectors that convert incident light into electrical signals. Image sensors are generally classified as either front-side-illuminated image sensors or back-illuminated image sensors. As the image sensor industry migrates to smaller and smaller pixel designs to increase resolution and reduce costs, the benefits of back-illumination become clearer. In front-side-illuminated image sensors, the electrical control lines or conductors are positioned between the photodetectors and the light-receiving side of the image sensor. The consequence of this positioning is the electrical conductors block part of the light that should be received by the photodetectors, resulting in poor quantum efficiency (QE) performance, especially for small pixels. For back-illuminated image sensors, the electrical control lines or conductors are positioned opposite the light-receiving side of the sensor and do not reduce QE performance.
Back-illuminated image sensors therefore solve the QE performance challenge of small pixel designs. But small pixel designs still have two other performance issues. First, small pixel designs suffer from low photodetector (PD) charge capacity. This is because the first order charge capacity scales along with the area of the photodetector. Second, the process of fabricating a back-illuminated sensor consists of bonding a device wafer to an interposer wafer and then thinning the device wafer. This process produces grid distortions. These grid distortions lead to the misalignments of the color filter array, which increases the amount of pixel-to-pixel color crosstalk.
These shortcomings were addressed in United States Patent Application Publication 2010/0327388 entitled “Back-Illuminated Image Sensors Having Both Front-side and Backside Photodetectors”. A cross-sectional diagram of one embodiment disclosed in this application is shown in FIG. 1. Front-side photodetectors 718f, 720f and 722f are disposed adjacent to the front-side surface 1100 and backside photodetectors 718b, 720b and 722b adjacent to the backside surface 1112 of the wafer. There are isolated pinning layers on both the front-side and backside surfaces of the wafer, 728 and 740 respectively, where the front-side and backside pinning layers are biased at different fixed potentials through contact 732 and 1104 respectively. FIG. 2 is graph of electrostatic potential along the line A-A shown in FIG. 1. A combined electrostatic photodetector potential 1200 is produced from the backside surface 1112 to the front-side surface 1100 that provides a small pixel with large charge capacity and low cross-talk. However some disadvantages can still exist with this structure compared to other image sensors such as interline CCD's and BSI sensors for infra-red imaging. These disadvantages can include poor electronic global shutter performance and poor infra-red QE.
A global electronic shutter (GES) operation is a desired feature for many applications that use both large and small pixels. In high speed machine vision applications, a global electronic shutter operation is desired to freeze motion of quickly moving objects. In digital photography applications, a global electronic shutter operation is desired for use with low light flash exposures and action photography. In order to maintain high image quality for global electronic shutter operation, a low dark current storage node is required. This low dark current storage node also needs to be isolated from the pixel sense node and well shielded from incident illumination in order to provide true Correlated Double Sampling (CDS) readout and accurate signal representation, respectively. Large pixel architectures have been disclosed that solve these problems to some degree, but require a large pixel area in order to implement multiple transistors and isolated storage nodes. Examples of these solutions are disclosed in U.S. Pat. No. 5,986,297, U.S. Pat. No. 6,540,991, U.S. Pat. No. 7,385,166, and in the articles entitled “Comparison of Global Shutter Pixels for CMOS Image Sensors” by S. Lauxtermann et al. and “A 2.2M CMOS Image Sensor for High Speed Machine vision Applications”, proc SPIE vol 7536, San Jose, January 2010. These solutions cannot be effectively implemented in small pixels due to the additional components in each pixel.
Many applications such as aerospace, defense, surveillance and machine vision require imaging in the both the visible and infrared spectrums. It is further desirable in these applications to use a single sensor to reduce system cost and complexity. In consumer digital photography applications for small pixels, there is a need to further increase the sensitivity of an image sensor by using a single pixel to detect, separately store and readout specific spectral bands so that all incident photons are utilized at each pixel. Prior art color separation per pixel structures have been implemented, but still have deficiencies. The most relevant example is disclosed in U.S. Pat. No. 5,965,875 and U.S. Pat. No. 6,632,701. With this structure, each pixel can collect and separate photogenerated charge from multiple color illumination, for example red, green and blue. Therefore each pixel utilizes more of the visible spectrum and does not require the use of a bandpass filter per pixel. However, this structure requires multiple circuit elements in each pixel, cannot perform a global electronic shutter, and has variable color separation characteristics depending on the color temperature and brightness of the illuminants and the scene. These deficiencies can preclude the use of this structure in applications that require small low noise pixels with high quality color reproduction.